1. Field
Embodiments of the invention relate generally to a non-volatile semiconductor memory device.
2. Background Art
Conventional flash memories are based on collective erase and selective write operation. In this operation, memory cells in no need of rewriting data are also rewritten. Hence, the reliability may be degraded with the increasing number of times of rewriting data. Further, a rewriting speed is decreased because memory cells in no need of rewriting data to rewrite are rewritten.
In conventional memories, a plurality of memory cells are formed in a common semiconductor layer on a substrate and have a common channel, which makes it difficult to implement selective erasure. In this context, JP-A 2006-190820 (Kokai) discloses a method for selective erasure by using holes resulting from band-to-band tunneling current. However, this method is prone to degradation in reliability because a local electric field is applied to memory cells. Furthermore, the operation is unstable because of the narrow driving margin between the selected cell and the non-selected cell.
It is desired to realize a memory in which only the memory cell in need of rewriting data can be selectively and stably rewritten so that the lifetime of memory cells can be extended. Further, it is possible to rewrite data at high speed by selective erasure.